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asix electronics corporation doc. no. ax873- 11.doc date : apr/26/1999 2f, no.13, industry east rd. ii, science-based industrial park, hsin-chu city, taiwan, r.o.c. tel: 886-3-579-9500 fax: 886-3-579-9558 http://www.asix.com.tw AX88873P 10/100base dual speed repeater controller 10/100base dual speed 8-port repeater ver. 1.1 features ieee 802.3u repeater compatible supports 8 10/100mbps rmii i/f repeater ports accompany with ax88872 to build a low cost dual speed repeater solution up-to 4 repeaters can be cascaded for vertical expansion up-to 3 chips can be cascaded locally for horizontal expansion all ports can be separately isolated or partitioned in response to fault condition separate jabber and partition state machines for each port per-port led display for jabber, partition, activity and global collision, utilization (%) for 10/100mbps presentation power on led diagnosis. all the led display will follow the ? on-off-on-off-normal ? operation procedure during/after power on reset 50mhz operation, 3.3volt and 128-pin pqfp product description the ax88873 10/100mbps dual speed repeater controller is a counterpart of ax88872 without built in 4-port s switch. it is design for low cost dual speed dumb hub application. the ax88873 directly supports up-to eight 10/100mbps automatic links rmii interfaces. maximum up-to 96 repeater ports can be constructed by stacking 1 ax88872 and 2 ax88873 chips horizontally and then cascading 4 horizontal board s vertically. with using 128-pin low cost package, accompany with ax88872 to build up low cost dual speed repeater application. not only perform the repeater function but gain additional 2 switch ports. the 2 dual speed switch ports are connected to external mii or rmii interfaces phy for various applications. for example, one port is use for down link and the other is used for up link to exten d the network topology. the other case is one port for up link and the other port for server. the ax88873 is designed base on ieee 802.3u clause 27 ? repeater for 100mb/s base-band networks ? it is fully compatible with ieee 802.3u standard. please refer ax872- 11 .doc to get more information about ax88872. system block diagram always contact asix for possible updates before starting a design. this data sheet contains new products information. asix electronics reserves the rights to modify product specification without notice. no liability is assumed as a result of the use of this product. no rights under any patent accompany the sale of the product. ax88873 #1 repeater controller buffer 100mbps horizontal cascade 10mbps and 100mbps vertical cascade upto 4 stacks ax88873 #0 repeater controller ax88872 #0 swipeater controller 10mbps horizontal cascade 2 quad rmii phy 2 quad rmii phy 2 quad rmii phy phy for up-link phy for down-link or server
asix electronics corporation 2 confidential AX88873P 10/100mb repeater controller preliminary contents 1.0 ax88873 overview ................................ ................................ ................................ ................................ ....... 4 1.1 g eneral d escription ................................ ................................ ................................ ................................ ...... 4 1.2 ax88873 b lock d iagram : ................................ ................................ ................................ .............................. 4 1.3 p in c onnection d iagram ................................ ................................ ................................ ............................... 5 2.0 pin description ................................ ................................ ................................ ................................ ........... 6 2.1 rmii interface for repeater ports ................................ ................................ ................................ ............... 6 2.1.1 repeater port 0 ................................ ................................ ................................ ................................ .......... 6 2.1.2 repeater port 1 ................................ ................................ ................................ ................................ .......... 6 2.1.3 repeater port 2 ................................ ................................ ................................ ................................ .......... 7 2.1.4 repeater port 3 ................................ ................................ ................................ ................................ .......... 7 2.1.5 repeater port 4 ................................ ................................ ................................ ................................ .......... 7 2.1.6 repeater port 5 ................................ ................................ ................................ ................................ .......... 7 2.1.7 repeater port 6 ................................ ................................ ................................ ................................ .......... 8 2.1.8 repeater port 7 ................................ ................................ ................................ ................................ .......... 8 2.2 e xpansion b us i nterface for 100 m bps ................................ ................................ ................................ ......... 8 2.3 e xpansion b us i nterface for 10 m bps ................................ ................................ ................................ ........... 9 2.4 led d isplay ................................ ................................ ................................ ................................ .................. 10 2.5 m iscellaneous ................................ ................................ ................................ ................................ .............. 10 2.6 p ower on configuration setup signals cross reference table ................................ ................................ 11 3.0 functional description ................................ ................................ ................................ ..................... 12 3.1 r epeater s tate m achine ................................ ................................ ................................ .............................. 12 3.2 rxe /txe c ontrol ................................ ................................ ................................ ................................ ...... 12 3.3 j abber s tate m achine ................................ ................................ ................................ ................................ .. 12 3.4 p artition s tate m achine ................................ ................................ ................................ ............................. 12 3.5 led d isplay i nterface ................................ ................................ ................................ ................................ 13 4.0 internal registers ................................ ................................ ................................ ................................ 14 5.0 electrical specification and timing ................................ ................................ .......................... 15 5.1 a bsolute m aximum r atings ................................ ................................ ................................ ........................ 15 5.2 g eneral o peration c onditions ................................ ................................ ................................ ................... 15 5.3 dc c haracteristics ................................ ................................ ................................ ................................ ..... 15 5.4 ac specifications ................................ ................................ ................................ ................................ ......... 16 5.4.1 rmii interface timing tx & rx ................................ ................................ ................................ ............... 16 5.4.2 mii interface timing tx & rx ................................ ................................ ................................ ................. 17 5.4.3 led display ................................ ................................ ................................ ................................ ......... 18 5.4.4 led display after reset ................................ ................................ ................................ ........................... 18 6.0 package information ................................ ................................ ................................ ........................... 19 appendix a: applications ................................ ................................ ................................ .......................... 20 a.1 16- port (24- port ) repeater with 2- port switch ................................ ................................ ......................... 20 a.2 16- port repeater with upto 4 stacks ................................ ................................ ................................ ......... 20 a.3 16- port repeater with upto 4 stacks up - link to external switch ................................ ........................... 21
asix electronics corporation 3 confidential AX88873P 10/100mb repeater controller preliminary figures f ig - 1 ax88873 b lock d iagram ................................ ................................ ................................ ............................. 4 f ig - 2 p in c onnection d iagram ................................ ................................ ................................ .............................. 5 f ig - 3 a pplication for led display ................................ ................................ ................................ ..................... 13
asix electronics corporation 4 confidential AX88873P 10/100mb repeater controller preliminary 1.0 ax88873 overview 1.1 general description the ax88873 is a simple dual speed repeater that provide s two expansion bus es for 10m and 100m segments respectively. accompany with ax88872 (build-in a 4-port switch) can construct high port count (16 ports or 24 ports) application and gain 2 additional switch ports. additional two switch ports are also useful for up-link or connection of server. the pin count of chip is reduced to 128 when design uses rmii i/f instead of mii. it is not only simplify the design but also user can choose low cost rmii quad phy. 1.2 ax88873 block diagram: 10/100 q-phy 10/100 q-phy rmii i/f rmii /mii translation for repeater port 0 -7 repeater state machine of 100mbps led interface cascade arbitration logic of 100mbps repeater state machine of 10mbps cascade arbitration logic of 10mbps per port jabber detection per port partition detection fig - 1 ax88873 block diagram
asix electronics corporation 5 confidential AX88873P 10/100mb repeater controller preliminary 1.3 pin connection diagram fig - 2 pin connection diagram vdd vss led_ck vss vss led<1> led<0> vss vss txd1[0] txd1[1] crs_dv2 rxd2[0] txen2 txd2[0] rxd2[1] txd2[1] txd5[1] rxd5[1] txd5[0] txen5 crs_dv5 rxd5[0] crs_dv6 rxd6[1] rxd6[0] txd6[0] txd6[1] txen6 crs_dv7 rxd7[1] rxd7[0] txd7[0] txen7 txd7[1] tird[1] tird_ck /tird_v tird[0] tird_odir mdo mdc nc nc vdd daisy_in daisy_out nc /rst /test vdd vss vdd ref_clk speed2 speed5 speed6 speed7 123 118 122 78 70 64 54 41 32 24 12 8 117 75 57 42 26 31 21 107 105 66 65 63 60 25 16 13 3 7 128 115 112 61 33 111 43 19 15 4 109 106 77 62 11 6 71 49 17 68 58 56 55 45 23 53 116 113 59 36 34 1 124 108 28 22 9 126 119 110 121 79 74 80 72 46 29 52 10 67 44 39 27 51 5 127 125 120 114 73 69 38 48 76 47 35 30 20 2 40 37 50 18 14 ax88873 103 104 82 91 81 86 93 94 84 87 95 96 90 88 92 85 89 83 98 97 99 100 102 101 vss speed4 rxd4[1] txen4 txd4[0] txd4[1] rxd4[0] crs_dv4 txd3[1] txd3[0] txen3 rxd3[1] crs_dv3 rxd3[0] vdd speed3 /ltir_act[0] /ltir_act[1] /ltir_act[2] /lhir_act[0] /lhir_act[1] /lhir_act[2] vss /hir_acti[0] /hir_acti[1] /hir_acti[2] /hir_acti[3] /tir_acti[0] /tir_acti[1] /tir_acti[2] /tir_acti[3] /tir_acto[0] /tir_acto[1] /tir_acto[2] /tir_acto[3] tird[2] tird[3] vdd /hir_acto[0] /hir_acto[1] /hir_acto[2] /hir_acto[3] vss vss vdd hird[0] /hird_v hird[2] hird_ck hird[3] hird[1] hird_odir nc vss nc vss speed1 rxd1[1] rxd1[0] crs_dv1 txen1 crs_dv0 rxd0[1] rxd0[0] txd0[1] txd0[0] txen0 vdd vss speed0
asix electronics corporation 6 confidential AX88873P 10/100mb repeater controller preliminary 2.0 pin description the following terms describe the ax88873 pin out: all pin names with the ? / ? suffix are asserted low. i = input o = output i/o = input /output 2.1 rmii interface for repeater ports 2.1.1 repeater port 0 signal name type pin no. description speed0 i 103 speed select : speed0 is not standard rmii signal. this signal is sourced from phy to inform repeater whether 10m or 100m speed is auto-negociated. active for 10mbps speed is selected depending on power on configuration. crs_dv0 i 104 carrier sense/receive data valid : crs_dv is asserted asynchronously on detection of carrier. crs_dv is asserted by the phy when receive medium is non-idle. loss of carrier shall result in the desertion of crs_dv synchronous to the cycle of ref_clk, which presents the first di-bit of a nibble on to rxd0[1:0]. rxd0[1:0] i 106,105 receive data : rxd0[1:0] is synchronous to ref_clk rxd0[1:0] shall be ? 00 ? to indicate idle when crs_dv is disserted. value other than ? 00 ? are reserved for out-of-band signaling shall be ignored by mac upon assertion of crs_dv, phy shall ensure that rxd[1:0] = ? 00 ? until proper receive decoding takes place txen0 o 108 transmit enable : txen0 is synchronous to ref_clk. txen0 indicates that mac is presenting di-bits on txd[1:0] for transmission. txen0 shall be negated prior to the 1st ref_clk rising edge following the final di-bit of a frame txd0[1:0] o 110,109 transmit data : txd0[1:0] shall transition synchronously to ref_clk. txd0[1:0] shall be ? 00 ? to indicate idle when tx_en is disserted. value other than ? 00 ? are reserved for out-of-band signaling shall be ignored by phy. when tx_en is asserted, txd[1:0] are accepted for transmission by phy 2.1.2 repeater port 1 signal name type pin no. description speed1 i 111 speed select : please references section 2.1. 1 port0 description. crs_dv1 i 113 carrier sense/receive data valid : please references section 2.1. 1 port0 description. rxd1[1:0] i 115,114 receive data : please references section 2.1.1 port0 description. txen1 o 116 transmit enable : please references section 2.1. 1 port0 description. txd1[1:0] o 119,118 transmit data : please references section 2.1. 1 port0 description.
asix electronics corporation 7 confidential AX88873P 10/100mb repeater controller preliminary 2.1.3 repeater port 2 signal name type pin no. description speed2 i 121 speed select : please references section 2.1. 1 port0 description. crs_dv2 i 122 carrier sense/receive data valid : please references section 2.1. 1 port0 description. rxd2[1:0] i 124,123 receive data : please references section 2.1.1 port0 description. txen2 o 125 transmit enable : please references section 2.1. 1 port0 description. txd2[1:0] o 127,126 transmit data : please references section 2.1. 1 port0 description. 2.1.4 repeater port 3 signal name type pin no. description speed3 i 1 speed select : please references section 2.1. 1 port0 description. crs_dv3 i 2 carrier sense/receive data valid : please references section 2.1. 1 port0 description. rxd3[1:0] i 4,3 receive data : please references section 2.1. 1 port0 description. txen3 o 5 transmit enable : please references section 2.1 .1 port0 description. txd3[1:0] o 7,6 transmit data : please references section 2.1. 1 port0 description. 2.1.5 repeater port 4 signal name type pin no. description speed4 i 9 speed select : please references section 2.1. 1 port0 description. crs_dv4 i 10 carrier sense/receive data valid : please references section 2.1. 1 port0 description. rxd4[1:0] i 12,11 receive data : please references section 2.1. 1 port0 description. txen4 o 13 transmit enable : please references section 2.1. 1 port0 description. txd4[1:0] o 15,14 transmit data : please references section 2.1. 1 port0 description. 2.1.6 repeater port 5 signal name type pin no. description speed5 i 19 speed select : please references section 2.1. 1 port0 description. crs_dv5 i 20 carrier sense/receive data valid : please references section 2.1. 1 port0 description. rxd5[1:0] i 23,22 receive data : please references section 2.1. 1 port0 description. txen5 o 24 transmit enable : please references section 2.1. 1 port0 description. txd5[1:0] o 26,25 transmit data : please references section 2.1. 1 port0 description.
asix electronics corporation 8 confidential AX88873P 10/100mb repeater controller preliminary 2.1.7 repeater port 6 signal name type pin no. description speed6 i 27 speed select : please references section 2.1. 1 port0 description. crs_dv6 i 28 carrier sense/receive data valid : please references section 2.1. 1 port0 description. rxd6[1:0] i 30,29 receive data : please references section 2.1. 1 port0 description. txen6 o 31 transmit enable : please references section 2.1. 1 port0 description. txd6[1:0] o 33,32 transmit data : please references section 2.1. 1 port0 description. 2.1.8 repeater port 7 signal name type pin no. description speed7 i 35 speed select : please references section 2.1. 1 port0 description. crs_dv7 i 36 carrier sense/receive data valid : please references section 2.1. 1 port0 description. rxd7[1:0] i 38,37 receive data : please references section 2.1 .1 port0 description. txen7 o 39 transmit enable : please references section 2.1. 1 port0 description. txd7[1:0] o 41,40 transmit data : please references section 2.1. 1 port0 description. 2.2 expansion bus interface for 100 mbps signal name type pin no. description hird[3:0] i/o/z /pu 1 01,100 99,98 inter repeater data : nibble data input/output. transfer data from the ? active ? ax88872/3 to all other ? inactive ? ax88872/3 chip s. the bus- master of the ird bus is determined by ir_ a ct bus arbitration. /hird_v i/o/z /pu 97 inter repeater data valid : this signal reflect s the rx_dv status of the active port. used to frame good packets. hird_ck i/o/z /pu 96 inter repeater clock valid : all inter repeater signals are synchronized to the rising edge of this clock. hird_odir o 95 inter repeater data in/out direction : this pin indicates the direction of ird data . ? high ? = h ird[3:0], / h ird_v , h ird_ck are output. ? low ? = h ird[3:0], / h ird_v , h ird_ck are input. /lhir_act[2:0] i/o/oc 83,81,80 local repeater activity in/out : the function is the same as /hir_acto[3:0] but for local repeater activity only. /hir_acti[3:0] i/pu 87,86 85,84 inter repeater activity in: these pins perform the same function as /hir_acto[3:0] when they serve as input function. then the /hir_acto[3:0] insert external buffers the input function must be replaced with /hir_acti [3:0]. /hir_acto[3:0] i/o/oc 93,92 91,90 inter repeater activity in/out: the local repeater activity appearance, the signal of the related rid (repeater id) will be asserted and as an output pin. all other pins serve as input pins but except the collision conditions. when collision occur s , the signal of related (rid-1) pins will also serve as outputs and will active during local collision period. the exception case is when rid = 0, then (rid-1) is replaced with (rid+1).
asix electronics corporation 9 confidential AX88873P 10/100mb repeater controller preliminary 2.3 expansion bus interface for 10 mbps signal name type pin no. description tird[3:0] i/o/z /pu 65,64 63,62 inter repeater data : nibble data input/output. transfer data from the ? active ? ax88872/3 to all other ? inactive ? ax88872/3 chip s. the bus- master of the ird bus is determined by ir_ a ct bus arbitration. /tird_v i/o/z /pu 60 inter repeater data valid : this signal reflect s the rx_dv status of the active port. used to frame good packets. tird_ck i/o/z /pu 59 inter repeater clock valid : all inter repeater signals are synchronized to the rising edge of this clock. tird_odir o 58 inter repeater data in/out direction : this pin indicates the direction of data for external transceiver. ? high ? = t ird[3:0], / t ird_v , t ird_ck are output. ? low ? = t ird[3:0], /t ird_v , t ird_ck are input. /ltir_act[2:0] i/o/oc 68,67,66 local repeater activity in/out : the function is the same as / t ir_acto[3:0] but for local repeater activity only. /tir_acti[3:0] i/pu 74,73, 72,71 inter repeater activity in: these pins perform the same function as /hir_acto[3:0] when they serve as input function. then the /hir_acto[3:0] insert external buffers the input function must be replaced with /hir_acti [3:0]. /tir_acto[3:0] i/o/oc 79,78 76,75 inter repeater activity in/out: the local repeater activity appearance, the signal of the related rid (repeater id) will be asserted and as an output pin. all other pins serve as input pins but except the collision conditions. when collision occur s , the signal of related (rid-1) pins will also serve as outputs and will active during local collision period. the exception case is when rid = 0, then (rid-1) is replaced with (rid+1).
asix electronics corporation 10 confidential AX88873P 10/100mb repeater controller preliminary 2.4 led display signal name type pin no. description led[1:0] o 5 5, 5 4 those signals indicate each port ? s statuses (such as a ctivity, jabber and p artition ) and global information(such as collision , repeater id, utilization ) in sequence. for detail , see the led timing specification the utilization of 100m segment and 10m segment are using the same scale . the utilization % display define as following : (see note 1 also) 1: led off 0: led on led[0] : this signal also indicates 10 0 m repeater collision ( blinking ) during the interval of sequence shift data. led[1] : this signal also indicates 10 m repeater collision ( blinking ) during the interval of sequence shift data. led_ck o 56 led clock : the signal is a discontinue clock for led signals serial shift out. the clock period width is 40 0 ns and last 32 cycle with every 52.4 ms repeated. 2.5 miscellaneous signal name type pin no. description /rst i 45 reset : active low the chip is reset when this signal is asserted low ref_clk i 47 reference clock : the input is a continuous clock at 50mhz for timing reference with rmii interface. daisy_in i/pu 51 repeater identification number daisy-chain in : when mode= ? 1 ? , this pin is a daisy chain serial input for repeater id. a state machine always monitors the input if a correct data (rid) present at the pin, the (rid+1) will be written to rid register and override the power on setup rid for the chip. daisy_out o/ml 52 repeater identification number daisy-chain out : when mode= ? 1 ? , this pin is periodically shift out the rid of itself to the next chained chip to inform that this id has already been occupied. the rid is shift out periodically every about 200us. mdo o 43 station management data out : for setup phy auto-negotiation registers. a burst write commands are issue to setup phy register after reset. the phy address 4h, 5h, 6h, 7h, 8h, 9h,ah and bh will be written as register 4h to value 00a1h ( advertise register set to 10/100 half-duplex mode)and register 0h to value 1000h(enable auto-negotiation). mdc o 42 station management data clock out : for mdo reference clock. /test i/pd 44 test pin : active low utilization % uti0 uti1 uti2 uti3 uti4 uti5 0 1 1 1 1 1 1 1 0 1 1 1 1 1 5 0 0 1 1 1 1 10 0 0 0 1 1 1 15 0 0 0 0 1 1 30 0 0 0 0 0 1 60 0 0 0 0 0 0
asix electronics corporation 11 confidential AX88873P 10/100mb repeater controller preliminary the pin is just for test mode setting purpose only. must be pull high when normal operation. nc o 16, 18 49,88 102 nc : keep no connection vdd i 17, 34 48, 57 77, 89 107, 120 power : +3.3v +/-5% vss i 8, 21 46, 50 53,61 69, 70 82, 94, 112, 117 128 power: 0v 2.6 power on configuration setup signals cross reference table signal name share with description speed_ define txd7[ 1 ] speed setting for repeater port 0 to port 7 : 0 : s peed0~7 pin is low for 10m,high for 100m 1 : s peed0~7 pin is low for 100m,high for 10m lrid_s1 lrid_s0 txd5[1] txd5[0] local repeater id select ion : lrid_s1 lrid_s0 lrid no. 1 1 0 1 0 1 0 1 2 0 0 reserved all of the above signals are pull-up for default values. note 1 : the calculation formulae of traffic utilization between asix and netcom is difference, so you will get different results when using smartbit (sb) testing this item. we found the smartbit calculate the utilization without include 96 bit time inter frame gap (ifg). so the utilization value can be 100%. as well as we found sb used min packet size (64 byte) and min ifg (96 bit-time) as 100% utilization. in theory, when max packet size (1518 byte) and min ifg the utilization will be more than 100%, but sb also treat it as 100%. in our ax88873 design, we use real cable bandwidth as calculation base. we calculate the bit counts of carrier within a unit time. because of the existence of inter frame gap, in our calculation 100% utilization is impossible. so the above two cases (64 byte packet size and 1518 byte packet size with min. ifg), we will count as 85.7% and 99.2%. if using sb test result to indicate utilization led the value must be modified. see the following reference table. asix ? s utilization% 1 5 10 15 30 60 smartbit ? s utilization% 2 7 12 17 34 68
asix electronics corporation 12 confidential AX88873P 10/100mb repeater controller preliminary 3.0 functional description 3.1 repeater state machine the repeater state machine is in i dle state when there is no carrier presented on any ports . when there is only one port has receive activity, the repeater state machine will enter d ata - f orwarding st ate to ensure correct data forwarding to other connected ports. if collision happens anytime, the repeater state machine detects collision then send jam pattern to all ports until collision ceases. 3.2 rxe /txe c ontrol idle state crs_dv(all) = 0, the repeater sends no data to any port. rxe(all) = 0. txe(all) = 0. data forwarding state if crs_dv (all) = 1, n is the only one port that has incoming packet. rxe(n) = 1, rxe(allxn) = 0. txe(n) = 0, txe(allxn) = 1. collision state if crs_dv (all) > 1, t he repeater sends jam pattern to all ports. rxe(all) = 0. txe(all) = 1. one port left state when all packets are back off except only one port still has activity, that is crs_dv (all) = 1 again . n is the only one left port that has incoming packet. the repeater sends jam pattern to all other port except for the still activity ports. rxe(all) = 0. txe(allxn) = 1. 3.3 jabber state machine to prevent an illegally long reception of data from reaching the repeater unit, each port has its own jabber timer. if a reception exceeds this duration (64k bit times for ax8887 2 a), the jabber condition will be detected. in this condition, repeater unit will disable receive and transmit packets for the jabbered port and the other ports remain the normal operation. when the carrier is no longer detected for the jabbered port or reset the repeater, the jabber state will be existed and the port will rece ive and transmi t packets normally . 3.4 partition state machine the partition state machine is used to protect network from being upset when a port suffer continuous collision, each port uses a partition state machine to detect and prevent this condition. when a port suffers from continuous 64 times of collision events, then it goes to partition state. the partitioned port will be not released until a packet without collision be transmitted( more than 512 bit times for ax8887 2 a) or reset the repeater.
asix electronics corporation 13 confidential AX88873P 10/100mb repeater controller preliminary 3.5 led display interface ax88873 provides per-port led status indication for partition, jabber, activity and support rate - based led for 10 and 100mbps segments utilization (%) . all led[1:0] perform active low. led[1:0] status driver wave-form as follows : jab7 jab6 jab5 jab4 jab3 jab2 jab1 jab0 led_ck led[0] led[0] continue led[1] d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 d11 d12 d13 d14 d10 d15 act0 act1 act2 act3 act4 act5 act6 act7 10m uti0 10m uti1 10m uti2 10m uti3 10m uti4 10m uti5 100m uti0 100m uti2 100m uti3 100m uti4 100m uti5 100m uti1 led[1] continue part 7 part 6 part 0 part 1 part 2 part 3 part 4 part 5 n/a n/a n/a n/a n/a n/a n/a n/a rid0 rid1 rid2 rid3 d16 d19 d20 d21 d22 d18 d23 d17 ( this portation no clock presented ) chip 0 memory test fail and/or 100m collision chip 1 memory test fail and/or 10m collision notes: a. part7~0indicates partition status for each port b. jab7~0 indicates jabber status for each port c. act7~0 indicates activity status for each port d. rid3~0 is the id of repeater chip e. 10m uti5~0 indicate global utilization rate of 10mbps for each 104.8ms sampling period. f. 100m uti5~0 indicate global utilization rate of 100mbps for each 104.8ms sampling period. it must use external shift register to decode data on led[1:0]. the application shows as follows: 74ls164(#1) q 0 q 1 q 2 q 3 q 4 q 5 q 6 q 7 d rid0 led[0] led_ck 74ls164(#3) q 0 q 1 q 2 q 3 q 4 q 5 q 6 q 7 d 74ls164(#2) q 0 q 1 q 2 q 3 q 4 q 5 q 6 q 7 d act7 act6 act5 act4 act3 act2 act1 act0 100m uti0 10m uti0 100m uti5 100m uti4 100m uti3 100m uti2 100m uti1 10m uti5 10m uti4 10m uti3 10m uti2 10m uti1 rid1 rid2 rid3 fig - 3 application for led display if the user don ? t want to show jabber status, take away the latter 74ls164(#2). the application is the same for led[1].
asix electronics corporation 14 confidential AX88873P 10/100mb repeater controller preliminary 4.0 internal registers the information reserve for intelligent function.
asix electronics corporation 15 confidential AX88873P 10/100mb repeater controller preliminary 5.0 electrical specification and timing 5.1 absolute maximum ratings description sym min max units operating temperature ta 0 +70 c storage temperature ts -55 +150 c supply voltage vcc -0.3 +4 v input voltage vin -0.3 vdd+0.5 v output voltage vout -0.3 vdd+0.5 v lead temperature (soldering 10 seconds maximum) tl -55 +220 c note : stress above those listed under absolute maximum ratings may cause permanent damage to the device. exposure to absolute maximum ratings conditions for extended period, adversely affect device life and reliability 5.2 general operation conditions description sym min max units operating temperature ta 0 +70 c supply voltage vdd +3.0 +3.6 v 5.3 dc characteristics (vdd=3.0v to 3.6v, vss=0v, ta=0 c to 70 c) description sym min max units low input voltage vil vss-0.3 0.8 v high input voltage vih 2 vdd+0.5 v low output voltage vol 0.4 v high output voltage voh 2.4 v input leakage current 1 (note 1) iil1 10 ua input leakage current 2 (note 2) iil1 500 ua output leakage current iol 10 ua description sym min tpy max units power consumption pc tbd ma note : 1. all the input pins without pull low or pull high. 2. those pins had been pull low or pull high.
asix electronics corporation 16 confidential AX88873P 10/100mb repeater controller preliminary 5.4 ac specifications 5.4.1 rmii interface timing t x & rx t0 t1 ref_clk t2 t3 tx_en txd crs_dv t2 t3 rxd symbol description min typ. max units t0 ref_clk clock cycle time 19.998 20 20.002 ns t1 ref_clk clock high time 7 10 13 ns t2 crs_dv, rxd, txen and txd data setup to ref_clk rising edge 4 ns t3 crs_dv, rxd, txen and txd data hold from ref_clk rising edge 2 ns
asix electronics corporation 17 confidential AX88873P 10/100mb repeater controller preliminary 5.4. 2 mii interface timing t x & rx t0 t1 txclk t2 t2 tx_en t3 t3 txd symbol description min typ. max units t0 txclk cycle time 39.996 40 40.004 ns t1 txclk high time 14 20 26 ns t2 tx_en delay from txclk high 7.440 21.760 ns t3 txd delay from txclk high 3.410 13.320 ns t4 t5 rx_clk crs t 6 rxdv t 7 rxd symbol description min typ. max units t4 rx_clk clock cycle time 39.996 40 40.004 ns t5 rx_clk clock high time 14 20 26 ns t 6 crs to rxdv delay requirement 40 160 ns t 7 rxd or rxdv setup to rx_clk rise time 10 - ns
asix electronics corporation 18 confidential AX88873P 10/100mb repeater controller preliminary 5.4. 3 led display t3 led_ck -------- - ~ ~ ------- d0 d1 d2 .............. d22 d23 d0 d1 d2 t4 t3 led_ck t1 t2 led[1:0] d0 d1 d2 d3 ------- d15 d0 symbol description min typ. max units t1 led setup to led_ck high 190 200 ns t2 led hold from led_ck high 200 210 ns t3 led_ck period width 400 ns t4 led_ck cycle burst out period 52.4 ms 5.4. 4 led display after reset /reset t1 t2 t2 t2 t3 led[2:0] symbol description min typ. max units t1 repeater reset time 1000 ns t2 led blink time after reset 838.4 ms t3 led dark time before normal display 419.2 ms
asix electronics corporation 19 confidential AX88873P 10/100mb repeater controller preliminary 6.0 package information b e d hd e he pin 1 a2 a1 l l1 q milimeter symbol min. nom max a1 0.21 0.31 0.41 a2 2.80 2.85 2.90 b 0.15 0.20 0.30 d 13.80 14.00 14.20 e 19.80 20.00 20.20 e 0.50 hd 17.10 17.20 17.30 he 23.10 23.20 23.30 l 0.70 0.80 0.90 l1 1.60 q 0 8
asix electronics corporation 20 confidential AX88873P 10/100mb repeater controller preliminary appendix a: applications some typical applications for ax88873 are illustrated bellow. a.1 16-port (24-port) repeater with 2-port switch note : add additional ax88873 to build a 24-port repeater a.2 16-port repeater with upto 4 stacks ax88873 #1 repeater controller buffer 100mbps horizontal cascade 10mbps and 100mbps vertical cascade upto 4 stacks ax88872 #0 swipeater controller 10mbps horizontal cascade 2 quad rmii phy 2 quad rmii phy phy for up-link phy for down-link or server ax88873 #1 repeater controller buffer 100mbps horizontal cascade 10mbps and 100mbps vertical cascade upto 4 stacks ax88872 #0 swipeater controller 10mbps horizontal cascade 2 quad rmii phy 2 quad rmii phy phy for up-link phy for down-link or server ax88873 #1 repeater controller buffer 100mbps horizontal cascade ax88872 #0 swipeater controller 10mbps horizontal cascade 2 quad rmii phy 2 quad rmii phy phy for up-link phy for down-link or server repeater #0 master repeater #3 slave repeater #1,#2 slave (omitted)
asix electronics corporation 21 confidential AX88873P 10/100mb repeater controller preliminary a.3 16-port repeater with upto 4 stacks up-link to external switch buffer 10mbps and 100mbps horizontal cascade 10mbps and 100mbps vertical cascade upto 4 stacks ax88873 #0 repeater controller 2 quad rmii phy 2 quad rmii phy ax88873 #1 repeater controller buffer 10mbps and 100mbps horizontal ax88873 #0 repeater controller 2 quad rmii phy 2 quad rmii phy ax88873 #1 repeater controller ax88620 8-port switch controller or ax88615 5-port switch controller quad phy quad phy or single phy 10m link 100m

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